1. Field of the Disclosure
The disclosure relates to a method and a device for measuring intermodulation distortions.
2. Related Technology
Intermodulation distortions (d3-intermodulation), especially in the form of adjacent-channel power (ACPR) represent an important specification especially for power amplifiers, which are used in mobile telephone base stations. This also applies in particular to power amplifiers, which are driven with several carrier signals. Nonlinearities in the power amplifier lead to crosstalk from one channel into the adjacent channels, causing an interference effect. To measure the intermodulation distortions of a power amplifier, the amplifier is therefore supplied with a measuring signal in the useful channel, and the power components in the adjacent channels are measured.
A method and a device for measuring intermodulation distortions in a device under test, such as a power amplifier, are already known from U.S. Pat. No. 6,263,289. With the method according to U.S. Pat. No. 6,263,289, a signal generator is connected to the input of the device under test (DUT). The device under test may, for example, be a power amplifier, which is terminated with a terminal resistance. A directional coupler is provided at each input and output of the device under test. The signal of the coupler at the output of the device under test is supplied directly to a signal combiner (power combiner), while the signal picked up via the coupler at the input of the device under test is supplied to the signal combiner through a network for modifying the level and the phase. The network for modifying the level and phase subjects the signal picked up at the input of the device under test to the same level and phase changes experienced by the signal in the device under test, but this signal pathway is subjected to an additional phase displacement of 180° relative to the signal pathway leading through the device under test. When measuring the adjacent-channel power (ACPR), adjacent-channel power components which are already contained in the input signal of the device under test are therefore compensated.
The method known from U.S. Pat. No. 6,263,289 has the disadvantage that a delay compensation is possible only within the range of a few 100 ns, because a larger delay compensation cannot be achieved by the network for modifying level and phase. Devices under test with longer delays cannot therefore be measured using the known methods. It is also disadvantageous that a network for modifying the level and phase, which operates with sufficient accuracy, is structured in a relatively expensive manner, as shown in FIG. 6 of U.S. Pat. No. 6,263,289. The known method is therefore associated with a relatively high realization costs.